JaCoP is a constraint solver created originally in 2001 and since then it is under further development and improvement. JaCoP aims at ease and intuitiveness of use followed by efficiency. It is written entirely in Java and supports constraints over boolean, integer, set and floating-point variables. Currently there exist stable version 4.4.

There are number of primitive constraints available in addition to conditinal and reified constraints as well as a handfull of global constraints, such as three versions of alldifferent constraint, circuit, cumulative, diff2, global cardinality, extensional support and conflict, regular and element. JaCoP implementation is based on the state of the art Constraint Programming algorithms backed by few years of experimentation with different designs. Some of the solver implementations aspects are novel and deserve publication on its own merit. JaCoP is not tailored to any specific domains, the aim is to obtain acceptable efficiency for a wide range of different applications. It is constantly under development and improves with each subsequent version. JaCoP was already succesfully used in a number of research projects at different places, such as Lund University (Sweden), Cork Constraint Computation Centre (Ireland), and INRIA/IRIS (Rennes).

JaCoP can be programmed in Java and Scala. There exist also a front-end for MiniZinc language.

Contact Information

For more information, contact Krzysztof Kuchcinski (Email: Krzysztof . Kuchcinski [at] cs . lth . se) or Radoslaw Szymanek (Email: radoslaw. szymanek [at] gmail . com).

More information abount the newest version of the solver can be found at  JaCoP Web site as well as on GitHub and Sourceforge.

Selected Papers Related to JaCoP

• Arslan, M. A., Gruian, F., Kuchcinski, K. and Karlsson, A., Code Generation for a SIMD Architecture with Custom Memory Organisation, Proc. Intl. Conference on Design & Architecture for Signal & Image Processing (DASAP), 2017.
• Mirza, U. M., Gruian, F. and Kuchcinski, K., Mapping streaming applications on multiprocessors with time-division-multiplexed network-on-chip, Computers and Electrical Engineering, vol. 40, no. 8, 2014, pp. 276-291.
• Arslan, M. A. and Kuchcinski, K., Instruction selection and scheduling for DSP kernels, Microprocessors and Microsystems, vol. 38, no. 8 Part A, November 2014, pp. 803-813.
• Martin, K., Wolinski, Ch., Kuchcinski, K., Floch, A. and Charot, F., Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation, ACM Trans. on Reconfigurable Technology and Systems (TRETS), vol. 5, no. 2, June 2012, pp. 1-30.
• Wolinski, Ch. and Kuchcinski, K. and Raffin, E., Automatic design of application-specific reconfigurable processor extensions with UPaK synthesis kernel, ACM Trans. on Design Automation of Electronic Systems (TODAES), vol. 15, no. 1, 2009, pp. 1-36.
• I-Lun Tseng and Postula A. Partitioning parameterized 45-degree polygons with constraint programming, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 13,  no. 3, July 2008, pp. 1-29.
• Wolinski C. and Kuchcinski K. Automatic Selection of Application-Specific Reconfigurable Processor Extensions, Proc. Intl. Conference on Design, Automation and Test in Europe (DATE), Munich, Germany, March 10 - 14, 2008.
• Jonathan Fromentin, Jean-Paul Comet, Pascale Le Gall and Olivier Roux. Analysing Gene regulatory Networks by both Constraint Programming and Model-Checking. In 29th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, (EMBC'07), Lyon, France, 23-26 August 2007.
• Radoslaw Szymanek and Barry OSullivan, Guiding Search using Constraint-level Advice, in Proceedings of ECAI-2006.
• D. Benavides, S. Segura, P. Trinidad and A. Ruiz-Cortés, Using Java CSP Solvers in the Automated Analyses of Feature Models, Post-proceedings Summer School on Generative and Transformational Techniques in Software Engineering (GTTSE'05). Braga, Portugal. 2005
• Krzysztof Kuchcinski, Constraints-Driven Scheduling and Resource Assignment, ACM Transactions on Design Automation of Electronic Systems, vol 8, no 3, July 2003, pp. 355-383.
• Radoslaw Szymanek, Francky Catthoor and Krzysztof Kuchcinski, Time-Energy Design Space Exploration for Multi-Layer Memory Architectures, in Proc. of 7th ACM/IEEE Design, Automation and Test in Europe Conference, 2004.
• Krzysztof Kuchcinski and Christophe Wolinski, Global Approach to Assignment and Scheduling of Complex Behaviors based on HCDG and Constraint Programming, Journal of Systems Architecture 49, 2003, pp.489-503.
• Radoslaw Szymanek and Krzysztof Kuchcinski, Partial Task Assignment of Task Graphs under Heterogeneous Resource Constraints, Proc. of the 40th Design Automation Conference, USA, Anaheim, June 2-6, 2003.
• Christophe Wolinski, Krzysztof Kuchcinski and Maya Gokhale, A Constraints Programming Approach to Communication Scheduling on SoPC Architectures, Proc. Symposium on Digital Systems Design, Rennes, France, Aug. 31-Sep. 3, 2004.